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George Mason University

2016-2017 University Catalog

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2016-2017 University Catalog

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ECE 448 - FPGA and ASIC Design with VHDL

Credits: 4
Limited to 2 Attempts
Offered by Electrical and Computer Engineering

Practical introduction to modeling of digital systems with VHDL for logic synthesis. Overview and comparative analysis of design flow and tools for FPGAs and standard-cell ASICs. Discusses verification of digital systems using testbenches, prototyping boards and modern testing equipment, and illustrates VHDL-based design methodology with multiple examples from communications, control, DSP, and cryptography. Laboratory experiments create link between simulation and actual hardware implementation based on FPGA boards.

Prerequisite(s): Grade of C or better in ECE 445.
Prerequisite(s) enforced by registration system.

Schedule Type: LAB,
LEC
Hours of Lecture or Seminar per week: 3
Hours of Lab or Studio per week: 3
When Offered: Spring

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ECE 448 - FPGA and ASIC Design with VHDL